Seminar: Bias Temperature Instability in CMOS Devices and Circuits

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Location: 117 DeBartolo Hall

Thursday, July 6
1:00 - 2:30pm
117 DeBartolo Hall

“Bias Temperature Instability in CMOS Devices and Circuits”
Presented by Souvik Mahapatra
Melchor Visiting Professor in Engineering

IEEE Fellow, Professor
Department of Electrical Engineering
Indian Institute of Technology, Bombay

Abstract
Bias Temperature Instability (BTI) remains a crucial reliability issue for CMOS devices. In this talk, I will discuss the physical mechanism of Negative BTI (NBTI) in PMOS and Positive BTI (PBTI) in NMOS devices using a consistent physical framework. This framework can explain the kinetics of BTI during and after DC and AC stress under different experimental conditions. It can also explain the gate insulator process dependence of BTI, and is consistent for degradation observed in large (deterministic) and small area (stochastic) devices. Finally, TCAD and SPICE implementation of the framework will be discussed to explore the impact of device design and predict BTI impact of SRAM parameters.

Bio

Souvik Mahapatra

Souvik Mahapatra received his PhD in Electrical Engineering from Indian Institute of Technology Bombay (IIT Bombay) in 1999. He worked at Bell Laboratories, Lucent Technologies (Murray Hill, NJ) from 2000-01. Since 2002, he has been with the department of Electrical Engineering at IIT Bombay and presently holds the position of full professor. His research interest is in the area of CMOS and memory device reliability. He has published more than 150 papers in peer-reviewed journals and conferences and has given invited talks and acted as session chairs  in several international conferences (including IEDM and IRPS). He is a fellow of IEEE (for contribution to CMOS device gate stack reliability), fellow of INAE (Indian National Academy of Engineering) and a distinguished lecturer of IEEE EDS. Co-sponsored by the College of Engineering.

Host:  Prof. Suman Datta